| Presentation | 2010-02-15 A binding method for testability based on resources sequential depth reduction Takaaki CHO, Toshinori HOSOKAWA, |
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| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | Behavioral descriptions are recently used for circuit designs on application specific fields. Behavioral synthesis is used to transform from behavioral descriptions to register transfer level circuits. Circuits generated by behavioral synthesis consist of data paths and controllers. Binding methods for testability were proposed to reduce sequential depths for data paths. A sequential depth is defined as the minimum number of registers between an input register and a primary output. Because there may exist paths which have the number of registers more than the sequential depth between an input register and a primary output, the paths may hinder to improve testability. In this paper, we propose a binding method for testability to reduce resource sequential depths. A resource sequential depth is defined as the minimum numbers of registers between each input of the resource and any primary inputs, and the minimum numbers of registers between each output of the resource and any primary outputs. We also propose a dummy operation scheduling method to reduce sequential depths furthermore. Experimental results show that the proposed method is effective for test generation time and fault coverage compared with the conventional method. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | behavioral synthesis / design for testability / sequential depth / resource sequential depth / dummy operation |
| Paper # | DC2009-70 |
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| Conference Information | |
| Committee | DC |
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| Conference Date | 2010/2/8(1days) |
| Place (in Japanese) | (See Japanese page) |
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| Topics (in Japanese) | (See Japanese page) |
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| Registration To | Dependable Computing (DC) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A binding method for testability based on resources sequential depth reduction |
| Sub Title (in English) | |
| Keyword(1) | behavioral synthesis |
| Keyword(2) | design for testability |
| Keyword(3) | sequential depth |
| Keyword(4) | resource sequential depth |
| Keyword(5) | dummy operation |
| 1st Author's Name | Takaaki CHO |
| 1st Author's Affiliation | Graduate School of Industrial Technology, Nihon University() |
| 2nd Author's Name | Toshinori HOSOKAWA |
| 2nd Author's Affiliation | College of Industrial Technology, Nihon University |
| Date | 2010-02-15 |
| Paper # | DC2009-70 |
| Volume (vol) | vol.109 |
| Number (no) | 416 |
| Page | pp.pp.- |
| #Pages | 8 |
| Date of Issue | |