| Presentation | 2010-02-15 A Method of Reproducing Input/Output Error Trace on High-level Design for Hardware Debug Support Yeonbok LEE, Tasuku NISHIHARA, Takeshi MATSUMOTO, Masahiro FUJITA, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | Post-silicon debugging of functional bugs is getting crucial due to the increasing complexity and the size of modern LSIs. Post-silicon debugging has been done by RTL simulation, but it has come to infeasible due to the limited simulation speed. In this paper, we propose a method to reproduce the input/output traces for behavior-level design from the original error input/output traces obtained in low levels including chip. The proposed method makes it possible to debug errors found in low-levels in high design abstraction-level, which improves the efficiency of debugging significantly with the high readability and reduced design size. We also demonstrate the experimental results obtained by applying our method to several design examples. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | High-level design / Debugging support / Post-silicon debug |
| Paper # | DC2009-69 |
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| Conference Information | |
| Committee | DC |
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| Conference Date | 2010/2/8(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | Dependable Computing (DC) |
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| Language | ENG |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A Method of Reproducing Input/Output Error Trace on High-level Design for Hardware Debug Support |
| Sub Title (in English) | |
| Keyword(1) | High-level design |
| Keyword(2) | Debugging support |
| Keyword(3) | Post-silicon debug |
| 1st Author's Name | Yeonbok LEE |
| 1st Author's Affiliation | Department of Electronics Engineering, School of Engineering, University of Tokyo() |
| 2nd Author's Name | Tasuku NISHIHARA |
| 2nd Author's Affiliation | Department of Electronics Engineering, School of Engineering, University of Tokyo |
| 3rd Author's Name | Takeshi MATSUMOTO |
| 3rd Author's Affiliation | VLSI Design and Education Center, University of Tokyo |
| 4th Author's Name | Masahiro FUJITA |
| 4th Author's Affiliation | VLSI Design and Education Center, University of Tokyo:CREST, Japan Science and Technology Agency(JST) |
| Date | 2010-02-15 |
| Paper # | DC2009-69 |
| Volume (vol) | vol.109 |
| Number (no) | 416 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |