| Presentation | 2010-02-15 Test Pattern Re-Ordering for Thermal-Uniformity during Test Makoto NAKAO, Tomokazu YONEDA, Michiko INOUE, Hideo FUJIWARA, |
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| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | Power consumption during VLSI testing varies spatially and temporally, and it leads to temperature variation during test. This paper presents a thermal-uniformity-aware test pattern re-ordering method to reduce temperature dependent delay variation for accurate delay testing. In the proposed method, we first divide a given test pattern sequence into a set of subsequences, and then re-order them so that the maximum temperature difference during test is minimized. Experimental results show that the proposed method can achieve thermal uniformity while preserving the power optimization effects such as power minimization or power variation minimization of the given ordered test set. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | thermal-uniformity / test pattern re-ordering |
| Paper # | DC2009-66 |
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| Conference Information | |
| Committee | DC |
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| Conference Date | 2010/2/8(1days) |
| Place (in Japanese) | (See Japanese page) |
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| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | Dependable Computing (DC) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Test Pattern Re-Ordering for Thermal-Uniformity during Test |
| Sub Title (in English) | |
| Keyword(1) | thermal-uniformity |
| Keyword(2) | test pattern re-ordering |
| 1st Author's Name | Makoto NAKAO |
| 1st Author's Affiliation | Graduate School of Information Science, Nara Institute of Science and Technology() |
| 2nd Author's Name | Tomokazu YONEDA |
| 2nd Author's Affiliation | Graduate School of Information Science, Nara Institute of Science and Technology |
| 3rd Author's Name | Michiko INOUE |
| 3rd Author's Affiliation | Graduate School of Information Science, Nara Institute of Science and Technology |
| 4th Author's Name | Hideo FUJIWARA |
| 4th Author's Affiliation | Graduate School of Information Science, Nara Institute of Science and Technology |
| Date | 2010-02-15 |
| Paper # | DC2009-66 |
| Volume (vol) | vol.109 |
| Number (no) | 416 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |