Presentation 2009-11-20
A Study of Task Allocation Problem for Many-core Processor with Consideration of Network Traffic
Shintaro SANO, Masahiro SANO, Shimpei SATO, Takefumi MIYOSHI, Kenji KISE,
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Abstract(in English) In many-core architecture that has dozens of cores in processor, it is important to improve performance by using parallelism in program. From the evaluation, we confirmed that program execution time depends on a manner of task assignment onto many-core architecture. It is hoped to give optimum task mapping by tools (compilers etc), because it is difficult for programmers to describe the mapping. In this paper, to establish methods for optimizing task mapping, a relation between execution time and task mapping is evaluated. At first, execution times when mappings are decided at random are measured. Next, relations with communications traffic and collision are considered.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) many-core / task mapping / Network-on-chip
Paper # CPSY2009-40
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Committee CPSY
Conference Date 2009/11/13(1days)
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Registration To Computer Systems (CPSY)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) A Study of Task Allocation Problem for Many-core Processor with Consideration of Network Traffic
Sub Title (in English)
Keyword(1) many-core
Keyword(2) task mapping
Keyword(3) Network-on-chip
1st Author's Name Shintaro SANO
1st Author's Affiliation Department of Computer Science, Tokyo Institute of Technology()
2nd Author's Name Masahiro SANO
2nd Author's Affiliation Graduate School of Information Science and Engineering, Tokyo Institute of Technology
3rd Author's Name Shimpei SATO
3rd Author's Affiliation Graduate School of Information Science and Engineering, Tokyo Institute of Technology
4th Author's Name Takefumi MIYOSHI
4th Author's Affiliation Graduate School of Information Science and Engineering, Tokyo Institute of Technology:Japan Science and Technology Agency
5th Author's Name Kenji KISE
5th Author's Affiliation Graduate School of Information Science and Engineering, Tokyo Institute of Technology
Date 2009-11-20
Paper # CPSY2009-40
Volume (vol) vol.109
Number (no) 296
Page pp.pp.-
#Pages 6
Date of Issue