Presentation 2009/11/19
Acceleration of ICA by FPGA-based hardware
Shunsuke FUJIO, Hidehisa SHIOMI, Yasuyuki OKAMURA,
PDF Download Page PDF download Page Link
Abstract(in Japanese) (See Japanese page)
Abstract(in English) The ICA (Independent Component Analysis) is one of the BSS (Blind Signal Separation) technologies. It can separate observed signals without teacher signals in the MIMO (Multiple-Input Multiple-Output) system. In this research, we designed the architecture of the ICA process running on multiple FPGA (Field Programmable Gate Array). The BER was measured by the MIMO system with the designed ICA architecture. And accuracy of the architecture was checked to compare the result by the designed architecture with that by PC. We thought that the designed architecture can operate the ICA process in real time.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) FPGA / Independent Component Analysis / Blind Signal Separation / MIMO
Paper # A・P2009-139
Date of Issue

Conference Information
Committee AP
Conference Date 2009/11/19(1days)
Place (in Japanese) (See Japanese page)
Place (in English)
Topics (in Japanese) (See Japanese page)
Topics (in English)
Chair
Vice Chair
Secretary
Assistant

Paper Information
Registration To Antennas and Propagation (A・P)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Acceleration of ICA by FPGA-based hardware
Sub Title (in English)
Keyword(1) FPGA
Keyword(2) Independent Component Analysis
Keyword(3) Blind Signal Separation
Keyword(4) MIMO
1st Author's Name Shunsuke FUJIO
1st Author's Affiliation Graduate School of Engineering Science, Osaka University()
2nd Author's Name Hidehisa SHIOMI
2nd Author's Affiliation Graduate School of Engineering Science, Osaka University
3rd Author's Name Yasuyuki OKAMURA
3rd Author's Affiliation Graduate School of Engineering Science, Osaka University
Date 2009/11/19
Paper # A・P2009-139
Volume (vol) vol.109
Number (no) 304
Page pp.pp.-
#Pages 4
Date of Issue