Presentation 2009-10-20
Investigation of Dynamically Reconfigurable Single Flux Quantum Logic Gates
Yuki YAMANASHI, Ichiro OKAWA, Nobuyuki YOSHIKAWA,
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Abstract(in English) Novel reconfigurable superconductive single flux quantum logic gates, the function of which can be dynamically defined by inputting control signals, have been investigated. Characteristics of single flux quantum circuits can be easily modulated by applying currents or magnetic fields because of high sensitivity of superconductive circuits. Two methods to reconfigure functions of a logic gate are investigated and compared to obtain the stable circuit operation. The one is applying magnetic field to logic gates using the magnetically coupling and the other is using direct current injection to the logic gate by using a non-destructive read-out flip-flop. Simulation results showed that using the non-destructive read-out flip-flop is suitable for the dynamically reconfigurable logic gates and we can obtain wide operating margins. As a first demonstration, a logic gate, which can be switched the circuit operations of a signal propagation and the latching function, has been designed and tested. The measured dc bias margin was 72.5%-107.2%. The investigated circuit structure can be applied to more sophisticated dynamically reconfigurable single flux quantum logic gates.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) Single Flux Quantum Circuit / Josephson junction / Reconfigurable Logic Gate / Programmable Logic Device
Paper # SCE2009-20
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Conference Information
Committee SCE
Conference Date 2009/10/13(1days)
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Registration To Superconductive Electronics (SCE)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Investigation of Dynamically Reconfigurable Single Flux Quantum Logic Gates
Sub Title (in English)
Keyword(1) Single Flux Quantum Circuit
Keyword(2) Josephson junction
Keyword(3) Reconfigurable Logic Gate
Keyword(4) Programmable Logic Device
1st Author's Name Yuki YAMANASHI
1st Author's Affiliation Interdisciplinary Research Center, Yokohama National University()
2nd Author's Name Ichiro OKAWA
2nd Author's Affiliation Department of Electrical and Computer Engineering, Yokohama National University
3rd Author's Name Nobuyuki YOSHIKAWA
3rd Author's Affiliation Department of Electrical and Computer Engineering, Yokohama National University
Date 2009-10-20
Paper # SCE2009-20
Volume (vol) vol.109
Number (no) 236
Page pp.pp.-
#Pages 5
Date of Issue