Presentation 2009-09-25
A Low-Power, Small Area Quadrature LC-VCO using miniature 3D Solenoid shaped Inductor
Akira TANABE, Ken'ichiro HIJIOKA, Hirokazu NAGASE, Yoshihiro HAYASHI,
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Abstract(in English) An extra small area, low-power 5GHz Quadrature LC-VCO and PLL have been fabricated using 3 dimensional (3D) solenoid shaped inductor in 90nm digital CMOS process. Because of the miniature 3D inductors, the chip area of LC-VCO is reduced to only 2597μm^2, which is about 1/10 of the reported smallest LC-VCOs and as small as that of ring oscillators. The phase noise of this LC-VCO is -103dBc/Hz at 1MHz offset, consuming only 2.8mW power at 1V supply voltage because of the small energy loss owing to the 3D inductor. Figure of Merit (FOM) of 173dB is better than ring oscillators. The PLL using this LC-VCO achieved 1.2ps jitter with the chip area as small as that of ring oscillators.
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Keyword(in English) LC-VCO / PLL / Inductor / CMOS
Paper # MW2009-83
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Committee MW
Conference Date 2009/9/18(1days)
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Registration To Microwaves (MW)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) A Low-Power, Small Area Quadrature LC-VCO using miniature 3D Solenoid shaped Inductor
Sub Title (in English)
Keyword(1) LC-VCO
Keyword(2) PLL
Keyword(3) Inductor
Keyword(4) CMOS
1st Author's Name Akira TANABE
1st Author's Affiliation LSI Fundamental Research Laboratory, NEC Electronics Corporation()
2nd Author's Name Ken'ichiro HIJIOKA
2nd Author's Affiliation LSI Fundamental Research Laboratory, NEC Electronics Corporation
3rd Author's Name Hirokazu NAGASE
3rd Author's Affiliation LSI Fundamental Research Laboratory, NEC Electronics Corporation
4th Author's Name Yoshihiro HAYASHI
4th Author's Affiliation LSI Fundamental Research Laboratory, NEC Electronics Corporation
Date 2009-09-25
Paper # MW2009-83
Volume (vol) vol.109
Number (no) 210
Page pp.pp.-
#Pages 6
Date of Issue