Presentation 2009-09-18
High-density Implementation for Reconfigurable Device MPLD
Hiroaki TOGUCHI, Masanori ASAEDA, Yutaro ODA, Naoki HIRAKAWA, Kazuya TANIGAWA, Tetsuo HIRONAKA, Masayuki SATO, Takashi ISHIGURO,
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Abstract(in English) In recent years, a lot of Programmable Logic Device (PLD) such as Field Programmable Gate Array (FPGA) has been used. As a new PLD, MPLD which have features of memory and logic circuit has been proposed. MPLD consists of MLUTs. MLUT has functions as LUT, switch block, and memory. By placing and connecting the neighboring arrays of MLUTs, MPLD can behave like conventional FPGA. Invesdigation on constitution method for MPLD architecture was considers, and performed tip trial manufacture for prototype MPLD (ProtMPLD). However, ProtMPLD is designed on the by the basic constitution of MPLD, but it did not perform enough for a practical circuit. In this paper, long interconnects as like as Torus Network line was introduced in the MPLD and evaluated by implimenting carry look ahead adder. As a result, the long interconnects as like as Torus Network decreases the number of MLUT used as wiring function. And enables High-density aplication on implementation for reconfigurable device MPLD.
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Keyword(in English) FPGA / MPLD / memory
Paper # RECONF2009-35
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Conference Information
Committee RECONF
Conference Date 2009/9/10(1days)
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Registration To Reconfigurable Systems (RECONF)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) High-density Implementation for Reconfigurable Device MPLD
Sub Title (in English)
Keyword(1) FPGA
Keyword(2) MPLD
Keyword(3) memory
1st Author's Name Hiroaki TOGUCHI
1st Author's Affiliation Graduate School of Information Sciences, Hiroshima City University()
2nd Author's Name Masanori ASAEDA
2nd Author's Affiliation Graduate School of Information Sciences, Hiroshima City University
3rd Author's Name Yutaro ODA
3rd Author's Affiliation Graduate School of Information Sciences, Hiroshima City University
4th Author's Name Naoki HIRAKAWA
4th Author's Affiliation Graduate School of Information Sciences, Hiroshima City University
5th Author's Name Kazuya TANIGAWA
5th Author's Affiliation Graduate School of Information Sciences, Hiroshima City University
6th Author's Name Tetsuo HIRONAKA
6th Author's Affiliation Graduate School of Information Sciences, Hiroshima City University
7th Author's Name Masayuki SATO
7th Author's Affiliation Taiyo Yuden Co., Ltd.
8th Author's Name Takashi ISHIGURO
8th Author's Affiliation Taiyo Yuden Co., Ltd.
Date 2009-09-18
Paper # RECONF2009-35
Volume (vol) vol.109
Number (no) 198
Page pp.pp.-
#Pages 6
Date of Issue