Presentation 2009-09-18
An FPGA-based Tiny Processing System for Small Embedded System and Education
Koji NAKANO, Yasuaki ITO, Kensuke KAWAKAMI, Koji SHIGEMOTO,
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Abstract(in English) The main contribution of this paper is to present a simple, scalable, and portable Tiny processing system which can be implemented in various FPGAs. Our processing system includes a 16-bit processor, a cross assembler, and a cross compiler. The source codes of our processing system are very simple and compact. The 16-bit processor is designed by Verilog HDL using 268 lines, and the cross assembler is written in 38 lines using Perl language. The cross compiler has 23 lines of Flex grammar file for lexical analysis, and 90 lines of Bison grammar file for context analysis and code generation. Hence, our tiny processing system is easy to understand and the function expansion is not difficult. We show applications of the system to education and small embedded system.
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Keyword(in English) Embedded System / CPU / Verilog HDL / Education
Paper # RECONF2009-32
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Committee RECONF
Conference Date 2009/9/10(1days)
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Language ENG
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) An FPGA-based Tiny Processing System for Small Embedded System and Education
Sub Title (in English)
Keyword(1) Embedded System
Keyword(2) CPU
Keyword(3) Verilog HDL
Keyword(4) Education
1st Author's Name Koji NAKANO
1st Author's Affiliation Department of Information Engineering, Hiroshima University()
2nd Author's Name Yasuaki ITO
2nd Author's Affiliation Department of Information Engineering, Hiroshima University
3rd Author's Name Kensuke KAWAKAMI
3rd Author's Affiliation Department of Information Engineering, Hiroshima University
4th Author's Name Koji SHIGEMOTO
4th Author's Affiliation Department of Information Engineering, Hiroshima University
Date 2009-09-18
Paper # RECONF2009-32
Volume (vol) vol.109
Number (no) 198
Page pp.pp.-
#Pages 6
Date of Issue