| Presentation | 2009-09-17 Component Labeling on the FPGA using Few Logic Elements Yasuaki ITO, Koji NAKANO, |
|---|---|
| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | In this paper, we present a hardware connected component labeling algorithm which is a task that assigns unique IDs to the connected components of a binary image. Our hardware on the FPGA assigns labels for k-concave binary images. Pixels of a binary image are given to the FPGA in raster order, and the resulting labels are also output in the same order. The advantage of our labeling algorithm is low latency and to use FPGA effectively. We have implemented our hardware labeling algorithm in an Altera Stratix Family FPGA, and evaluated the performance. The implementation result shows that for a 20-concave binary image of 2048×2048, our connected component labeling algorithm runs in approximately 72ms and its latency is approximately 2.9ms. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Connected component labeling / FPGA / Hardware algorithm / Image processing |
| Paper # | RECONF2009-20 |
| Date of Issue |
| Conference Information | |
| Committee | RECONF |
|---|---|
| Conference Date | 2009/9/10(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
| Secretary | |
| Assistant | |
| Paper Information | |
| Registration To | Reconfigurable Systems (RECONF) |
|---|---|
| Language | ENG |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Component Labeling on the FPGA using Few Logic Elements |
| Sub Title (in English) | |
| Keyword(1) | Connected component labeling |
| Keyword(2) | FPGA |
| Keyword(3) | Hardware algorithm |
| Keyword(4) | Image processing |
| 1st Author's Name | Yasuaki ITO |
| 1st Author's Affiliation | Department of Information Engineering, Hiroshima University() |
| 2nd Author's Name | Koji NAKANO |
| 2nd Author's Affiliation | Department of Information Engineering, Hiroshima University |
| Date | 2009-09-17 |
| Paper # | RECONF2009-20 |
| Volume (vol) | vol.109 |
| Number (no) | 198 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |