Presentation 2009-06-24
Design of 30nm FinFET with Halo Structure
Tetsuo Endoh, Koji Sakui, Yukio Yasuda,
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Abstract(in English) Design of 30nm FinFETs with halo structure for suppressing the threshold voltage roll-off and improving the subthreshold swing at the same time is proposed for the first time. The performances of nano scale FinFETs with halo structure are analyzed using a two-dimensional device simulator. The device characteristics, focusing especially on the threshold voltage and subthreshold slope, are investigated for different gate length, body thickness, and halo impurity concentration. From the viewpoint of body potential control, it is made clear on how to design the halo structure to suppress the short channel effects and improve the subthreshold-slope. It is shown that by introducing the halo structure to FinFETs, nano-scale FinFETs achieves an improved S-factor and suppressed Vth roll-off simultaneously.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) FinFET / Halo I/I / MOSFET / threshold voltage roll-off / S-factor / device design
Paper # ED2009-64,SDM2009-59
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Conference Information
Committee SDM
Conference Date 2009/6/17(1days)
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Registration To Silicon Device and Materials (SDM)
Language ENG
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Design of 30nm FinFET with Halo Structure
Sub Title (in English)
Keyword(1) FinFET
Keyword(2) Halo I/I
Keyword(3) MOSFET
Keyword(4) threshold voltage roll-off
Keyword(5) S-factor
Keyword(6) device design
1st Author's Name Tetsuo Endoh
1st Author's Affiliation Center for Interdisciplinary Research, TOHOKU UNIVERSITY:JST CREST()
2nd Author's Name Koji Sakui
2nd Author's Affiliation Center for Interdisciplinary Research, TOHOKU UNIVERSITY:JST CREST
3rd Author's Name Yukio Yasuda
3rd Author's Affiliation Center for Interdisciplinary Research, TOHOKU UNIVERSITY:JST CREST
Date 2009-06-24
Paper # ED2009-64,SDM2009-59
Volume (vol) vol.109
Number (no) 98
Page pp.pp.-
#Pages 4
Date of Issue