Presentation | 2009-06-24 A 0.18μm CMOS over 10Gb/s 10-PAM Serial Link Receiver Jeongjun Lee, Jikyung Jeong, Jinwook Burm, |
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Abstract(in Japanese) | (See Japanese page) |
Abstract(in English) | A multi Gb/s multi-level pulse amplitude modulation (PAM) receiver for chip to chip communication is proposed. Increasing data bit rate is achieved with 10-PAM. To increase data bit-rate and reduce BER, We designed this circuit by using a current mode amplifier, CML circuit. The 10-PAM receiver is designed in 0.18μm CMOS technology and achieves Gb/s of data bit rates. The simulated BER is less than 1.0×10^<-12>. The simulation results showed that the 0.5×0.6mm^2 chip consumes 57mA at 12.8Gb/s from a 1.8-V supply. |
Keyword(in Japanese) | (See Japanese page) |
Keyword(in English) | 10-PAM / Transceiver / Receiver / Transmitter / CMOS |
Paper # | ED2009-58,SDM2009-53 |
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Conference Information | |
Committee | SDM |
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Conference Date | 2009/6/17(1days) |
Place (in Japanese) | (See Japanese page) |
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Paper Information | |
Registration To | Silicon Device and Materials (SDM) |
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Language | ENG |
Title (in Japanese) | (See Japanese page) |
Sub Title (in Japanese) | (See Japanese page) |
Title (in English) | A 0.18μm CMOS over 10Gb/s 10-PAM Serial Link Receiver |
Sub Title (in English) | |
Keyword(1) | 10-PAM |
Keyword(2) | Transceiver |
Keyword(3) | Receiver |
Keyword(4) | Transmitter |
Keyword(5) | CMOS |
1st Author's Name | Jeongjun Lee |
1st Author's Affiliation | Dept. of Electronic Engineering, Sogang University() |
2nd Author's Name | Jikyung Jeong |
2nd Author's Affiliation | Dept. of Electronic Engineering, Sogang University |
3rd Author's Name | Jinwook Burm |
3rd Author's Affiliation | Dept. of Electronic Engineering, Sogang University |
Date | 2009-06-24 |
Paper # | ED2009-58,SDM2009-53 |
Volume (vol) | vol.109 |
Number (no) | 98 |
Page | pp.pp.- |
#Pages | 4 |
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