| Presentation | 2009-08-04 Implementation of Linear Circuit Simulator FALCON on Multi-Core CPU Yuichi TANJI, Takayuki WATANABE, Hideki ASAI, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | In this report, we introduce a linear circuit simulator, FALCON, which is required for evaluating the signal/power integrity of VLSIs, packages, and printed circuit boards. FALCON is implemented on multi-core CPU which becomes recently available. We confirm that the FALCON implemented on 8-core CPU suitably is 5 to 9 times faster than the original. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Power/Signal Integrity / Multi-Core CPU / Direct/Iterative Linear Solver / OpenMP / BLAS |
| Paper # | NLP2009-58 |
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| Conference Information | |
| Committee | NLP |
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| Conference Date | 2009/7/27(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | Nonlinear Problems (NLP) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Implementation of Linear Circuit Simulator FALCON on Multi-Core CPU |
| Sub Title (in English) | |
| Keyword(1) | Power/Signal Integrity |
| Keyword(2) | Multi-Core CPU |
| Keyword(3) | Direct/Iterative Linear Solver |
| Keyword(4) | OpenMP |
| Keyword(5) | BLAS |
| 1st Author's Name | Yuichi TANJI |
| 1st Author's Affiliation | Dept. of RISE, Kagawa University() |
| 2nd Author's Name | Takayuki WATANABE |
| 2nd Author's Affiliation | School of Administration and Informatics, University of Shizuoka |
| 3rd Author's Name | Hideki ASAI |
| 3rd Author's Affiliation | Dept. of Systems Eng., Shizuoka University |
| Date | 2009-08-04 |
| Paper # | NLP2009-58 |
| Volume (vol) | vol.109 |
| Number (no) | 167 |
| Page | pp.pp.- |
| #Pages | 5 |
| Date of Issue | |