| Presentation | 2009-07-01 A Bound of Errors of a Solution for a Kind of Resistive Circuits Including Active Elements Tetsuo NISHI, Shin'ichi OISHI, Yusuke NAKAYA, |
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| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | We show that the validated analysis for some kinds of networks composed of linear passive resistors and some kinds of active elements such as VCVS, CCCS and transistors are possible without any knowledge on the method of constructing a circuit equation, results of LU decomposition, etc. The evaluation of the bound of errors are given in terms of circuit elements and residual currents at each node. The hyperdominancy of the part of linear passive resistor circuit is utilized for the analysis. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | accuracy-guaranteed algorithm / linear passive resistor network / VCVS / CCCS / transistor / hyperdominant matrix |
| Paper # | CAS2009-4,VLD2009-9,SIP2009-21 |
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| Conference Information | |
| Committee | SIP |
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| Conference Date | 2009/6/24(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | Signal Processing (SIP) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A Bound of Errors of a Solution for a Kind of Resistive Circuits Including Active Elements |
| Sub Title (in English) | |
| Keyword(1) | accuracy-guaranteed algorithm |
| Keyword(2) | linear passive resistor network |
| Keyword(3) | VCVS |
| Keyword(4) | CCCS |
| Keyword(5) | transistor |
| Keyword(6) | hyperdominant matrix |
| 1st Author's Name | Tetsuo NISHI |
| 1st Author's Affiliation | School of Science and Engineering, Waseda University() |
| 2nd Author's Name | Shin'ichi OISHI |
| 2nd Author's Affiliation | School of Science and Engineering, Waseda University |
| 3rd Author's Name | Yusuke NAKAYA |
| 3rd Author's Affiliation | School of Science and Engineering, Waseda University |
| Date | 2009-07-01 |
| Paper # | CAS2009-4,VLD2009-9,SIP2009-21 |
| Volume (vol) | vol.109 |
| Number (no) | 112 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |