Presentation | 2009-06-12 VLSI Design of a Dynamic Reconfigurable MMSE Detector for 4x4 MIMO-OFDM Receiver Hirokazu IKEUCHI, Shingo YOSHIZAWA, Yoshikazu MIYANAGA, |
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Abstract(in Japanese) | (See Japanese page) |
Abstract(in English) | This report presents a VLSI architecture of dynamic reconfigurable MMSE detection in a 4x4 MIMO-OFDM receiver. A circuit for MIMO-OFDM that computes the matrix inversion of each subcarrier by the real-time has been designed. But it is required small circuit area to downscale system and save power-consumption. We propose a technique to optimize arithmetic units in the allowed time of pipelined MMSE detector by adopting a dynamic reconfigurable architecture to compute Strassen's algorithms of matrix inversion and multiplication. The proposed technique achieves large reduction of circuit area and power consumption. The designed circuit has been implemented to a 90-nm CMOS process and evaluated in processing latency, circuit area and power consumption. |
Keyword(in Japanese) | (See Japanese page) |
Keyword(in English) | MIMO-OFDM / MIMO Decoder / MMSE Detection / Dynamic Reconfigurable / VLSI Architecture |
Paper # | SIS2009-14 |
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Committee | SIS |
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Conference Date | 2009/6/4(1days) |
Place (in Japanese) | (See Japanese page) |
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Paper Information | |
Registration To | Smart Info-Media Systems (SIS) |
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Language | JPN |
Title (in Japanese) | (See Japanese page) |
Sub Title (in Japanese) | (See Japanese page) |
Title (in English) | VLSI Design of a Dynamic Reconfigurable MMSE Detector for 4x4 MIMO-OFDM Receiver |
Sub Title (in English) | |
Keyword(1) | MIMO-OFDM |
Keyword(2) | MIMO Decoder |
Keyword(3) | MMSE Detection |
Keyword(4) | Dynamic Reconfigurable |
Keyword(5) | VLSI Architecture |
1st Author's Name | Hirokazu IKEUCHI |
1st Author's Affiliation | Graduate School of Information Science and Technology, Hokkaido University() |
2nd Author's Name | Shingo YOSHIZAWA |
2nd Author's Affiliation | Graduate School of Information Science and Technology, Hokkaido University |
3rd Author's Name | Yoshikazu MIYANAGA |
3rd Author's Affiliation | Graduate School of Information Science and Technology, Hokkaido University |
Date | 2009-06-12 |
Paper # | SIS2009-14 |
Volume (vol) | vol.109 |
Number (no) | 78 |
Page | pp.pp.- |
#Pages | 6 |
Date of Issue |