| Presentation | 2009-06-19 Note on Yield and Area Trade-offs for MBIST in SoC Masayuki Arai, Tatsuro Endo, Kazuhiko Iwasaki, Michinobu Nakao, Iwao Suzuki, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | In this study we evaluate the effectiveness of hardware overhead reduction of memory BIST and spare assignment algorithm. For a given memory cell fail rate, we theoretically analyze the area per a good die of an SoC with multiple SRAMs. We then propose the heuristic algorithm which determine whether each SRAM has the redundant row or not so that the area per a good die is minimized. We further propose the encoder-based comparator with small hardware overhead. With the memory benchmark SoCs which have more than 1000 SRAMs, the proposed comparator with heuristic algorithm is evaluated under several scenarios. The result shows that the overhead of encoder-based comparator is about the half of the conventional one, and combined with the heuristic algorithm it can reduce the total SoC area per a good die by 0.7%. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | embedded SRAM / MBIST / BISR / area per a good die |
| Paper # | DC2009-11 |
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| Conference Information | |
| Committee | DC |
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| Conference Date | 2009/6/12(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
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| Vice Chair | |
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| Paper Information | |
| Registration To | Dependable Computing (DC) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Note on Yield and Area Trade-offs for MBIST in SoC |
| Sub Title (in English) | |
| Keyword(1) | embedded SRAM |
| Keyword(2) | MBIST |
| Keyword(3) | BISR |
| Keyword(4) | area per a good die |
| 1st Author's Name | Masayuki Arai |
| 1st Author's Affiliation | Faculty of System Design, Tokyo Metropolitan University:Graduate School of System Design, Tokyo Metropolitan University() |
| 2nd Author's Name | Tatsuro Endo |
| 2nd Author's Affiliation | Graduate School of System Design, Tokyo Metropolitan University |
| 3rd Author's Name | Kazuhiko Iwasaki |
| 3rd Author's Affiliation | Faculty of System Design, Tokyo Metropolitan University:Graduate School of System Design, Tokyo Metropolitan University |
| 4th Author's Name | Michinobu Nakao |
| 4th Author's Affiliation | Renesas Technology Corp. |
| 5th Author's Name | Iwao Suzuki |
| 5th Author's Affiliation | Renesas Technology Corp. |
| Date | 2009-06-19 |
| Paper # | DC2009-11 |
| Volume (vol) | vol.109 |
| Number (no) | 95 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |