| Presentation | 2009-03-12 A Formal Verification Method for On-Chip Programmable Interconnect Takaaki TAGAWA, Hiroaki YOSHIDA, Masahiro FUJITA, |
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| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | As the development cost increases, programmable devices such as FPGAs are becoming critically important. A key component of such programmable devices is a programmable interconnect. Typically they are designed with full-custom design methodology and hence it is likely to have design errors. In this paper, we propose a formal verification method for on-chip programmable interconnect at the transistor level. We present a scalability analysis of the proposed method and also demonstrate that the proposed method successfully proves the correctness of an actual VLSI design. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Programmable interconenct / formal verification / satisfiability problem / FPGA |
| Paper # | VLD2008-142 |
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| Conference Information | |
| Committee | VLD |
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| Conference Date | 2009/3/4(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | VLSI Design Technologies (VLD) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A Formal Verification Method for On-Chip Programmable Interconnect |
| Sub Title (in English) | |
| Keyword(1) | Programmable interconenct |
| Keyword(2) | formal verification |
| Keyword(3) | satisfiability problem |
| Keyword(4) | FPGA |
| 1st Author's Name | Takaaki TAGAWA |
| 1st Author's Affiliation | Dept. of Electronic Engineering, University of Tokyo() |
| 2nd Author's Name | Hiroaki YOSHIDA |
| 2nd Author's Affiliation | VLSI Design and Education Center (VDEC), University of Tokyo:CREST, Japan Science and Technology Agency |
| 3rd Author's Name | Masahiro FUJITA |
| 3rd Author's Affiliation | VLSI Design and Education Center (VDEC), University of Tokyo:CREST, Japan Science and Technology Agency |
| Date | 2009-03-12 |
| Paper # | VLD2008-142 |
| Volume (vol) | vol.108 |
| Number (no) | 478 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |