Presentation 2009-03-11
Fault Tolerant Datapath Synthesis Starting with Triple Algorithmic Redundancy
Yutaka TSUBOISHI, Mineo KANEKO,
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Abstract(in English) In this paper, we investigate the problem to synthesize a fault-tolerant datapath from a triplicated computation algorithm via high-level synthesis framework. Major tasks of this datapath synthesis are scheduling and resource assignment, both of which are heavily constrained by the requirement of fault-tolerance. We propose two methods to do them, one is a method using integer linear programming (ILP) framework, and the other is a heuristic method. The experimental results show that our heuristic algorithm terminates quickly even for medium and large size problems, and outputs a comparable solution to the ILP-based method, or a reasonable solution which is sufficiently near the lower bound.
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Keyword(in English) fault tolerance / redundancy / high-level synthesis / integer linear programming
Paper # VLD2008-132
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Committee VLD
Conference Date 2009/3/4(1days)
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Registration To VLSI Design Technologies (VLD)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Fault Tolerant Datapath Synthesis Starting with Triple Algorithmic Redundancy
Sub Title (in English)
Keyword(1) fault tolerance
Keyword(2) redundancy
Keyword(3) high-level synthesis
Keyword(4) integer linear programming
1st Author's Name Yutaka TSUBOISHI
1st Author's Affiliation Japan Advanced Institute of Science and Technology()
2nd Author's Name Mineo KANEKO
2nd Author's Affiliation Japan Advanced Institute of Science and Technology
Date 2009-03-11
Paper # VLD2008-132
Volume (vol) vol.108
Number (no) 478
Page pp.pp.-
#Pages 6
Date of Issue