| Presentation | 2009-03-05 A Post-silicon Debug Support Using Dynamic Program Slicing on High-level Design Description Yeonbok LEE, Takeshi MATSUMOTO, Masahiro FUJITA, |
|---|---|
| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | Post-silicon debug of functional bugs is getting mandatory while it is a painful task due to the low controllability/observability of internal states of hardware chips. In this paper, we propose a bug localization method utilizing the existing concepts of dynamic program slicing and high-level design methodology. We derive slices for the output variable of the high-level design description corresponding to the output pin of target chip where an error trace is observed. At this time, we preserve the timing information on each statement of the slice as well. Then, assuming that multiple error patterns for the same bug are given, we extract the intersection of the slices for those error traces. Furthermore, we compare the execution patterns among the statements of each slice in terms of timing, then rank by means of the matching frequency which is regarded as suspicious degree to be the bug. We also developed a tool to achieve a part of our method and several experimental results are provided. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | HW debug / post-silicon debug |
| Paper # | CPSY2008-93,DC2008-84 |
| Date of Issue |
| Conference Information | |
| Committee | DC |
|---|---|
| Conference Date | 2009/2/26(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
| Secretary | |
| Assistant | |
| Paper Information | |
| Registration To | Dependable Computing (DC) |
|---|---|
| Language | ENG |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A Post-silicon Debug Support Using Dynamic Program Slicing on High-level Design Description |
| Sub Title (in English) | |
| Keyword(1) | HW debug |
| Keyword(2) | post-silicon debug |
| 1st Author's Name | Yeonbok LEE |
| 1st Author's Affiliation | Department of Electronics Engineering, School of Engineering, University of Tokyo() |
| 2nd Author's Name | Takeshi MATSUMOTO |
| 2nd Author's Affiliation | VLSI Design and Education Center, University of Tokyo |
| 3rd Author's Name | Masahiro FUJITA |
| 3rd Author's Affiliation | VLSI Design and Education Center, University of Tokyo |
| Date | 2009-03-05 |
| Paper # | CPSY2008-93,DC2008-84 |
| Volume (vol) | vol.108 |
| Number (no) | 464 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |