| Presentation | 2009-03-05 A Study on Implementation of IPsec for Multi-Core CPU Tatsunori TSUJIMURA, Kiyofumi TAKEUCHI, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | In this paper, we introduce an implementation of IPsec with IPv6/stream cipher that achieves throughput 1Gbps for Multi-Core CPU, and we reports on the evaluation. In the evaluation, it was implemented for the CPU that had 16 MIPS64 cores (500MHz), and it achieved throughput 1Gbps when the packets that the frame length was over 1024 bytes were processed. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | IPsec / Multi-Core / Encrypt Communication / Virtual Private Network |
| Paper # | SITE2008-45,IA2008-68 |
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| Conference Information | |
| Committee | IA |
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| Conference Date | 2009/2/26(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | Internet Architecture(IA) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A Study on Implementation of IPsec for Multi-Core CPU |
| Sub Title (in English) | |
| Keyword(1) | IPsec |
| Keyword(2) | Multi-Core |
| Keyword(3) | Encrypt Communication |
| Keyword(4) | Virtual Private Network |
| 1st Author's Name | Tatsunori TSUJIMURA |
| 1st Author's Affiliation | Information Technology R & D Center, Mitsubishi Electric Corporation() |
| 2nd Author's Name | Kiyofumi TAKEUCHI |
| 2nd Author's Affiliation | Information Technology R & D Center, Mitsubishi Electric Corporation |
| Date | 2009-03-05 |
| Paper # | SITE2008-45,IA2008-68 |
| Volume (vol) | vol.108 |
| Number (no) | 460 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |