| Presentation | 2009-04-17 Reliability Tests of Multi-Chip PLC Modules Takao FUKUMITSU, Yoshiyuki DOI, Yasuaki TAMURA, Ryouichi KASAHARA, Akimasa KANEKO, Senichi SUZUKI, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | Recently improvement of photonic network systems require high performance functional optical devices. We have been developed PLC multi-chip integration technologies which are combining PLC's with multiple functions to realize multiple functional optical devices with a high performance and cost effectiveness. To apply PLC multi-chip integration module to practical use, it is necessary to have stability with chip-to-chip connection especially. Therefore reliability test of PLC multi-chip integration module is needed to confirm module reliability. In this paper, we describe some reliability test and long term reliability test of PLC multi-chip integration module and their results. And we report PLC multi-chip integration module have superior reliability in practical use confirmed by the test results. Besides we researched PLC multi-chip integration module with larger PLC chip and tested them for long term liliabirity. We also report PLC multi-chip integration module with larger PLC chip have reliability sufficiently. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | PLC multi-chip integration technologies / Reliability test / PLC direct attachment / VOA-AWG / Insertion loss |
| Paper # | R2009-3,CPM2009-3,OPE2009-3 |
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| Conference Information | |
| Committee | CPM |
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| Conference Date | 2009/4/10(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Vice Chair | |
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| Paper Information | |
| Registration To | Component Parts and Materials (CPM) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Reliability Tests of Multi-Chip PLC Modules |
| Sub Title (in English) | |
| Keyword(1) | PLC multi-chip integration technologies |
| Keyword(2) | Reliability test |
| Keyword(3) | PLC direct attachment |
| Keyword(4) | VOA-AWG |
| Keyword(5) | Insertion loss |
| 1st Author's Name | Takao FUKUMITSU |
| 1st Author's Affiliation | NTT Photonics Labs., NTT Corp.() |
| 2nd Author's Name | Yoshiyuki DOI |
| 2nd Author's Affiliation | NTT Photonics Labs., NTT Corp. |
| 3rd Author's Name | Yasuaki TAMURA |
| 3rd Author's Affiliation | NTT Electronics Corp. |
| 4th Author's Name | Ryouichi KASAHARA |
| 4th Author's Affiliation | NTT Electronics Corp. |
| 5th Author's Name | Akimasa KANEKO |
| 5th Author's Affiliation | NTT Photonics Labs., NTT Corp. |
| 6th Author's Name | Senichi SUZUKI |
| 6th Author's Affiliation | NTT Photonics Labs., NTT Corp. |
| Date | 2009-04-17 |
| Paper # | R2009-3,CPM2009-3,OPE2009-3 |
| Volume (vol) | vol.109 |
| Number (no) | 7 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |