| Presentation | 2009-05-15 A low-power clustering tool using both routability and activity for FPGAs Junya ETO, Motoki AMAGASAKI, Masahiro IIDA, Toshinori SUEYOSHI, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | Although FPGA (Field Programmable Gate Array) has high flexibility, there is a problem that power consumption is larger than ASIC (Application Specific Integrated Circuit). The manufacturing process of FPGA faces the deep-sub-micron era, and the proportion of a static power in power consumption is growing relatively now. Therefore, it is necessary to reduce not only a dynamic power but also a static power to improve power consumption. As an improvement at the EDA (Electronic Design Automation) level of this problem, we propose a new power-aware clustering tool using both activity as a reduction of the dynamic power and routability as a reduction of the static power for cluster-based FPGA. As a result, the average power improvement is 26.1% over T-RPack and 1.7% over P-T-VPack. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | clustering / cluster-based FPGA / low-power / switching activity / routability |
| Paper # | RECONF2009-10 |
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| Conference Information | |
| Committee | RECONF |
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| Conference Date | 2009/5/7(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | Reconfigurable Systems (RECONF) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A low-power clustering tool using both routability and activity for FPGAs |
| Sub Title (in English) | |
| Keyword(1) | clustering |
| Keyword(2) | cluster-based FPGA |
| Keyword(3) | low-power |
| Keyword(4) | switching activity |
| Keyword(5) | routability |
| 1st Author's Name | Junya ETO |
| 1st Author's Affiliation | Department of Computer Science and Electrical Engineering, Graduate School of Science and Technology, Kumamoto University() |
| 2nd Author's Name | Motoki AMAGASAKI |
| 2nd Author's Affiliation | Department of Computer Science and Electrical Engineering, Graduate School of Science and Technology, Kumamoto University |
| 3rd Author's Name | Masahiro IIDA |
| 3rd Author's Affiliation | Department of Computer Science and Electrical Engineering, Graduate School of Science and Technology, Kumamoto University |
| 4th Author's Name | Toshinori SUEYOSHI |
| 4th Author's Affiliation | Department of Computer Science and Electrical Engineering, Graduate School of Science and Technology, Kumamoto University |
| Date | 2009-05-15 |
| Paper # | RECONF2009-10 |
| Volume (vol) | vol.109 |
| Number (no) | 26 |
| Page | pp.pp.- |
| #Pages | 6 |
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