Presentation 2009-05-15
Recovery and syncronization technique for TMR softcore processor
Yoshihiro ICHINOMIYA, Shiro TANOUE, Toshio YABUTA, Motoki AMAGASAKI, Morihiro KUGA, Toshinori SUEYOSHI,
PDF Download Page PDF download Page Link
Abstract(in Japanese) (See Japanese page)
Abstract(in English) This paper presents a technique for ensuring reliable softcore processor implemented on SRAM-based Field Programmable Gate Arrays (FPGAs). Although FPGA is easy to be attacked by Single Event Upsets (SEUs), it can clear these errors due to its reconfigurability. In the case of combinational circuit, Triple Modular Redundancy (TMR) with the dynamic partial reconfiguration (DPR) assure its reliability. But these techniques don't assure reliability of the sequential circuit, because processing states are cleared by reconfiguration. So, we propose the synchronization technique after DPR using a interrupt process. Proposed system accomplish synchronization process only 8μs time overhead.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) FPGA / TMR / Partial Reconfiguration / reliability / SEU / synchronization process
Paper # RECONF2009-9
Date of Issue

Conference Information
Committee RECONF
Conference Date 2009/5/7(1days)
Place (in Japanese) (See Japanese page)
Place (in English)
Topics (in Japanese) (See Japanese page)
Topics (in English)
Chair
Vice Chair
Secretary
Assistant

Paper Information
Registration To Reconfigurable Systems (RECONF)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Recovery and syncronization technique for TMR softcore processor
Sub Title (in English)
Keyword(1) FPGA
Keyword(2) TMR
Keyword(3) Partial Reconfiguration
Keyword(4) reliability
Keyword(5) SEU
Keyword(6) synchronization process
1st Author's Name Yoshihiro ICHINOMIYA
1st Author's Affiliation Graduate School of Science and Technology, Kumamoto University()
2nd Author's Name Shiro TANOUE
2nd Author's Affiliation Graduate School of Science and Technology, Kumamoto University
3rd Author's Name Toshio YABUTA
3rd Author's Affiliation Graduate School of Science and Technology, Kumamoto University
4th Author's Name Motoki AMAGASAKI
4th Author's Affiliation Graduate School of Science and Technology, Kumamoto University
5th Author's Name Morihiro KUGA
5th Author's Affiliation Graduate School of Science and Technology, Kumamoto University
6th Author's Name Toshinori SUEYOSHI
6th Author's Affiliation Graduate School of Science and Technology, Kumamoto University
Date 2009-05-15
Paper # RECONF2009-9
Volume (vol) vol.109
Number (no) 26
Page pp.pp.-
#Pages 6
Date of Issue