| Presentation | 2009-04-21 Pulse Propagation Analysis for SER Estimation of Logic Circuits Shoji HARADA, Yusuke AKAMINE, Masayoshi YOSHIMURA, Yusuke MATSUNAGA, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | As a transistor feature size scales down in recent years, soft error tends to increase. In logic circuits, a pulse genarated at the output of a gate will cause an error if it propagates to a primary output or is latched into a memory element. When circuit designers consider a soft error tolerance in circuit design, they must examine whether the circuit has desirable soft error tolerance. Generally, Soft error rate (SER) is used as an index of such purpose. Computing SER needs pulse generation probability and pulse propagation probability. The latter is computed with pulse propagation analysis. It needs to consider maskings which block pulse propagation and Pulse Transformation (PT). Currently, most past methods do not consider PT in pulse propagation analysis and the methods sufficiently is considered the validity. In this paper, We estimate an impact of considering PT or not in pulse propagation analysis against SER compution accuracy. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | soft error / logic circuit / timing simulation |
| Paper # | CPSY2009-9,DC2009-9 |
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| Conference Information | |
| Committee | DC |
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| Conference Date | 2009/4/14(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | Dependable Computing (DC) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Pulse Propagation Analysis for SER Estimation of Logic Circuits |
| Sub Title (in English) | |
| Keyword(1) | soft error |
| Keyword(2) | logic circuit |
| Keyword(3) | timing simulation |
| 1st Author's Name | Shoji HARADA |
| 1st Author's Affiliation | Graduate School of Information Science and Electrical Engineering, Kyushu University() |
| 2nd Author's Name | Yusuke AKAMINE |
| 2nd Author's Affiliation | Graduate School of Information Science and Electrical Engineering, Kyushu University |
| 3rd Author's Name | Masayoshi YOSHIMURA |
| 3rd Author's Affiliation | Faculty of Information Science and Electrical Engineering, Kyushu University |
| 4th Author's Name | Yusuke MATSUNAGA |
| 4th Author's Affiliation | Faculty of Information Science and Electrical Engineering, Kyushu University |
| Date | 2009-04-21 |
| Paper # | CPSY2009-9,DC2009-9 |
| Volume (vol) | vol.109 |
| Number (no) | 12 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |