| Presentation | 2009-04-21 Pulse Generation Analysis for SER Estimation Targeted to Cell-based Design Daisuke KOZUWA, Masayoshi YOSHIMURA, Yusuke MATSUNAGA, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | The charge deposition that results from a neutron strikes to a transistor alter the memory state or the logic state of output at a gate is called soft error. To design logic circuits of tolerance to soft error, it is necesary to evaluate the soft error tolerance of a gate. SER (Soft Error Rate) is a measure of soft error tolerance at a gate. If the characteristics of the pulse generated by a neutron strike are characterized beforehand for every library gate, it becomes possible to obtain SER of the circuit without circuit simulation for all the gates. To characterize the pulse width and the pulse generation probability, this paper describes a pulse generation analysis method using HSPICE simulation to obtain the pulse generation probability at a gate by a pulse width. The experimental results that evaluate the approximate accuracy of our method show our approximation error is very small compared to HSPICE. When the number of samples that results from HSPICE simulation was little, our approximation error was also small as well as the samples were a lot of numbers, and the difference of SER derived from variation of the number of samples was very little. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | soft error / logic circuit / SER / cell-based design / HSPICE |
| Paper # | CPSY2009-8,DC2009-8 |
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| Conference Information | |
| Committee | DC |
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| Conference Date | 2009/4/14(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | Dependable Computing (DC) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Pulse Generation Analysis for SER Estimation Targeted to Cell-based Design |
| Sub Title (in English) | |
| Keyword(1) | soft error |
| Keyword(2) | logic circuit |
| Keyword(3) | SER |
| Keyword(4) | cell-based design |
| Keyword(5) | HSPICE |
| 1st Author's Name | Daisuke KOZUWA |
| 1st Author's Affiliation | Graduate School of Information Science and Electrical Engineering, Kyushu University() |
| 2nd Author's Name | Masayoshi YOSHIMURA |
| 2nd Author's Affiliation | Faculty of Information Science and Electrical Engineering, Kyushu University |
| 3rd Author's Name | Yusuke MATSUNAGA |
| 3rd Author's Affiliation | Faculty of Information Science and Electrical Engineering, Kyushu University |
| Date | 2009-04-21 |
| Paper # | CPSY2009-8,DC2009-8 |
| Volume (vol) | vol.109 |
| Number (no) | 12 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |