Presentation 2009-04-21
Fast Soft Error Rate Estimation for Circuits Containing Arithmetic Units
Motoharu HIRATA, Masayoshi YOSHIMURA, Yuusuke MATSUNAGA, Hiroto YASUURA,
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Abstract(in English) This paper describes soft errors which are errors in LSI that are due to external radiation. The soft error rate (SER) which means probability of invalid outputs per unit time is one of the estimetion measures for soft error tolerance of LSI. Logic level estimation method by the fault simulation can strict SER estimation technique. But If worst comes to worst, it costs time that is proportional to the square of scale of the circuit. The proposed technique can fast SER estimation by omission of logic level simulation in arithmetic units. If we know the input values of arithmetic units, we can calculate the output values of them at high speed by arithmetic operation. When error occured in arithmetic units, the proposed technique uses probabilistic medel about the error propagation to the output of them. The model generates output values of them artifically. The proposed technique aims at the speed-up of the SER estimation by using the model. Experimental result shows that the proposed technique can estimate about four times as fast as existing technique although the accuracy hardly falls.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) soft error / soft error rate (SER) / fault simulation / arithmetic unit
Paper # CPSY2009-5,DC2009-5
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Committee DC
Conference Date 2009/4/14(1days)
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Paper Information
Registration To Dependable Computing (DC)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Fast Soft Error Rate Estimation for Circuits Containing Arithmetic Units
Sub Title (in English)
Keyword(1) soft error
Keyword(2) soft error rate (SER)
Keyword(3) fault simulation
Keyword(4) arithmetic unit
1st Author's Name Motoharu HIRATA
1st Author's Affiliation Graduate School of Information Science and Electrical Engineering, Kyushu University()
2nd Author's Name Masayoshi YOSHIMURA
2nd Author's Affiliation Faculty of Information Science and Electrical Engineering, Kyushu University
3rd Author's Name Yuusuke MATSUNAGA
3rd Author's Affiliation Faculty of Information Science and Electrical Engineering, Kyushu University
4th Author's Name Hiroto YASUURA
4th Author's Affiliation Faculty of Information Science and Electrical Engineering, Kyushu University
Date 2009-04-21
Paper # CPSY2009-5,DC2009-5
Volume (vol) vol.109
Number (no) 12
Page pp.pp.-
#Pages 6
Date of Issue