| Presentation | 2009-05-22 Estimation of CPA attack for AES using Simulation method Kimihiro YAMAKOSHI, Akihiro YAMAGISHI, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | Side-channel attack using information leakage such as power consumption, electro-magnetic radiation and operation time becomes a large threat. This paper estimates the tamper-resistance of AES module using the simulation method. Logic-gate State-transition times corresponding to a power consumption of CMOS logic circuits is counted by a constant interval time and correlation factor between the transition times and a humming distance of register is calculated. Some results of the simulation show that small interval time leads to a decline of the accuracy of sub-key estimation. This means that high-spec equipment for measuring power consumption of LSI does not always need in CPA attack. It is difficult to modify ASIC circuits after manufacturing ASIC chips, therefore estimating tamper resistance in designing circuits based on simulation method is effective for ASICs. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | AES / CPA / Side-Channel attack / DPA / simulation / LSI |
| Paper # | ISEC2009-3 |
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| Conference Information | |
| Committee | ISEC |
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| Conference Date | 2009/5/15(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | Information Security (ISEC) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Estimation of CPA attack for AES using Simulation method |
| Sub Title (in English) | |
| Keyword(1) | AES |
| Keyword(2) | CPA |
| Keyword(3) | Side-Channel attack |
| Keyword(4) | DPA |
| Keyword(5) | simulation |
| Keyword(6) | LSI |
| 1st Author's Name | Kimihiro YAMAKOSHI |
| 1st Author's Affiliation | NTT Microsystem Integration Laboratories() |
| 2nd Author's Name | Akihiro YAMAGISHI |
| 2nd Author's Affiliation | NTT Microsystem Integration Laboratories |
| Date | 2009-05-22 |
| Paper # | ISEC2009-3 |
| Volume (vol) | vol.109 |
| Number (no) | 42 |
| Page | pp.pp.- |
| #Pages | 8 |
| Date of Issue | |