| Presentation | 2009-01-29 An Efficient Cut Enumeration for Depth-Optimum Technology Mapping for LUT-based FPGAs Taiga TAKATA, Yusuke MATSUNAGA, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | This paper presents a top-down cut enumeration for depth-minimum technology mapping for LUT-based FPGAs. Enumerating all cuts with large size consumes long run-time because the number of cuts increases with the size of cuts. The proposed algorithm enumerates partial cuts with a guarantee that a depth-minimum network can be constructed, and runs faster than enumerating all cuts. The experimental results show that the proposed algorithm runs about 6 times and 16 times faster than bottom-up exhaustive enumeration for K=8, 9, respectively. The proposed algorithm also runs about 2 times faster than top-down exhaustive enumeration for K=8, 9, respectively. Area of network derived by the set of cuts enumerated by the proposed algorithm is only 4% larger than that derived by exhaustive enumeration on average, and the depth is the same. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | reconfigurable system / FPGA / technology mapping / cut enumeration |
| Paper # | VLD2008-101,CPSY2008-63,RECONF2008-65 |
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| Conference Information | |
| Committee | VLD |
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| Conference Date | 2009/1/22(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | VLSI Design Technologies (VLD) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | An Efficient Cut Enumeration for Depth-Optimum Technology Mapping for LUT-based FPGAs |
| Sub Title (in English) | |
| Keyword(1) | reconfigurable system |
| Keyword(2) | FPGA |
| Keyword(3) | technology mapping |
| Keyword(4) | cut enumeration |
| 1st Author's Name | Taiga TAKATA |
| 1st Author's Affiliation | Kyushu University() |
| 2nd Author's Name | Yusuke MATSUNAGA |
| 2nd Author's Affiliation | Kyushu University |
| Date | 2009-01-29 |
| Paper # | VLD2008-101,CPSY2008-63,RECONF2008-65 |
| Volume (vol) | vol.108 |
| Number (no) | 412 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |