Presentation 2009-01-23
Far-end Crosstalk reduction techniques for balanced transmission lines
Kosuke Kawai, Shinichi Sasaki, Haruyoshi Mizumoto,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English) User's demand on high speed digital systems has been significantly increasing in the present years. This results on the advancement of VLSI technology, and fine printed wiring board technology. Board designers challenged to new problems, the far-end crosstalk (FEXT) on microstrip lines. This paper discussed about method for far-end-crosstalk (FEXT) reduction technique by adding the capacitors between balanced pair signal lines. The difference of common mode and differencial mode velocities can be reduced by adding the capacitor between signal lines. This results in the FEXT reduction. The effectiveness of capacitor addition on FEXT reduction was evaluated on balanced lines too.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) Printed Circuit borad / Micro-strip Line / balanced transmission lines / Cross-talk / Capacitance Addition
Paper # EMCJ2008-106
Date of Issue

Conference Information
Committee EMCJ
Conference Date 2009/1/16(1days)
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Paper Information
Registration To Electromagnetic Compatibility (EMCJ)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Far-end Crosstalk reduction techniques for balanced transmission lines
Sub Title (in English)
Keyword(1) Printed Circuit borad
Keyword(2) Micro-strip Line
Keyword(3) balanced transmission lines
Keyword(4) Cross-talk
Keyword(5) Capacitance Addition
1st Author's Name Kosuke Kawai
1st Author's Affiliation Graduate School of Engineering, Saga Uiversity()
2nd Author's Name Shinichi Sasaki
2nd Author's Affiliation School of Science and Technology, Saga University
3rd Author's Name Haruyoshi Mizumoto
3rd Author's Affiliation School of Science and Technology, Saga University
Date 2009-01-23
Paper # EMCJ2008-106
Volume (vol) vol.108
Number (no) 401
Page pp.pp.-
#Pages 5
Date of Issue