Presentation 2009-01-22
Performance Improvement for Bias-Offset Transconductor Using Adaptively Biasing Technique
Fujihiko MATSUMOTO, Toshio MIYAZAWA, Shintaro NAKAMURA, Yasuaki NOGUCHI,
PDF Download Page PDF download Page Link
Abstract(in Japanese) (See Japanese page)
Abstract(in English) In this paper, performance improvement with low-power consumption for bias-offset transconductor using adaptively biasing technique is proposed. This method is used to reduce wasteful operating current without reduction of operating range. Moreover, two MOSFETs operating as resisters are employed to improve the linearity of deteriorated transconductance characteristic by using the adaptively biasing technique. This simulation results show that the proposed technique are effective to realize low-power and high-linearity transconductor.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) Analog integrated circuits / Transconductor / Linear Circuit / CMOS / Low Power / Linearization
Paper # CAS2008-65,NLP2008-95
Date of Issue

Conference Information
Committee CAS
Conference Date 2009/1/15(1days)
Place (in Japanese) (See Japanese page)
Place (in English)
Topics (in Japanese) (See Japanese page)
Topics (in English)
Chair
Vice Chair
Secretary
Assistant

Paper Information
Registration To Circuits and Systems (CAS)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Performance Improvement for Bias-Offset Transconductor Using Adaptively Biasing Technique
Sub Title (in English)
Keyword(1) Analog integrated circuits
Keyword(2) Transconductor
Keyword(3) Linear Circuit
Keyword(4) CMOS
Keyword(5) Low Power
Keyword(6) Linearization
1st Author's Name Fujihiko MATSUMOTO
1st Author's Affiliation Faculty of Engineering, National Defense Academy()
2nd Author's Name Toshio MIYAZAWA
2nd Author's Affiliation Faculty of Engineering, National Defense Academy
3rd Author's Name Shintaro NAKAMURA
3rd Author's Affiliation Faculty of Engineering, National Defense Academy
4th Author's Name Yasuaki NOGUCHI
4th Author's Affiliation Faculty of Engineering, National Defense Academy
Date 2009-01-22
Paper # CAS2008-65,NLP2008-95
Volume (vol) vol.108
Number (no) 388
Page pp.pp.-
#Pages 6
Date of Issue