| Presentation | 2009-02-16 A Method to Increase the Number of Don't care based on Easy-To-Detected Faults : Application for BAST Architecture LingLing WAN, Motohiro WAKAZONO, Toshinori HOSOKAWA, Masayoshi YOSHIMURA, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | BAST is one of techniques which are combined ATPG and BIST to reduce the amount of test data while maintaining the high test quality. On BAST architecture, a bit-flipping technique is used to convert pseudo-random patterns to deterministic patterns. In this paper, we propose don't care identification technique for random-pattern registant faults which identifies unnecessary signal value to detect the fault set as don't care bits. Random-pattern registant faults are defined as the detection time for each fault by given test pattern set is equal or less than N. We also propose a method of mapping between a pseudo-random pattern set and a deterministic pattern set for random-pattern registant faults to which don't care identification technique is applied. We apply the proposed method for ISCAS'89 and ITC'99 benchmark circuits and show that the proposed method effectively reduces the number of bit-flips. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | BAST Architecture / don't care Identification / bit flipping Reduction / mapping / random-pattern registant fault |
| Paper # | DC2008-76 |
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| Conference Information | |
| Committee | DC |
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| Conference Date | 2009/2/9(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | Dependable Computing (DC) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A Method to Increase the Number of Don't care based on Easy-To-Detected Faults : Application for BAST Architecture |
| Sub Title (in English) | |
| Keyword(1) | BAST Architecture |
| Keyword(2) | don't care Identification |
| Keyword(3) | bit flipping Reduction |
| Keyword(4) | mapping |
| Keyword(5) | random-pattern registant fault |
| 1st Author's Name | LingLing WAN |
| 1st Author's Affiliation | Graduate School of Industrial Technology, Nihon University() |
| 2nd Author's Name | Motohiro WAKAZONO |
| 2nd Author's Affiliation | Graduate School of Industrial Technology, Nihon University |
| 3rd Author's Name | Toshinori HOSOKAWA |
| 3rd Author's Affiliation | College of Industrial Technology, Nihon University |
| 4th Author's Name | Masayoshi YOSHIMURA |
| 4th Author's Affiliation | Graduate School of Information Science and Electrical Engineering, Kyushu University |
| Date | 2009-02-16 |
| Paper # | DC2008-76 |
| Volume (vol) | vol.108 |
| Number (no) | 431 |
| Page | pp.pp.- |
| #Pages | 6 |
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