Presentation | 2009/1/22 A Use of Self-Erase Discharges and Floating Pulse for Low Voltage Addressing of PDPs Yuki IMAI, Tomokazu SHIGA, |
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Abstract(in Japanese) | (See Japanese page) |
Abstract(in English) | In order to reduce the data voltage of PDP, a drive technique utilizing a floating pulse was developed for a self-erase-discharge addressing. Floating pulse enables a use of higher wall-charge-accumulating pulse voltage, resulting in the reduction of address voltage. With the address technique, minimum address voltage was 0V. Light emission duty was 70% when the number of groups and subfields were 3 and 15, respectively. Voltage margin of the wall-charge-accumulation pulse was 10V. |
Keyword(in Japanese) | (See Japanese page) |
Keyword(in English) | plasma display / low data voltage driving / self-erase-discharge / erase addressing / floating pulse |
Paper # | EID2008-61 |
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Conference Information | |
Committee | EID |
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Conference Date | 2009/1/22(1days) |
Place (in Japanese) | (See Japanese page) |
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Topics (in Japanese) | (See Japanese page) |
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Paper Information | |
Registration To | Electronic Information Displays (EID) |
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Language | JPN |
Title (in Japanese) | (See Japanese page) |
Sub Title (in Japanese) | (See Japanese page) |
Title (in English) | A Use of Self-Erase Discharges and Floating Pulse for Low Voltage Addressing of PDPs |
Sub Title (in English) | |
Keyword(1) | plasma display |
Keyword(2) | low data voltage driving |
Keyword(3) | self-erase-discharge |
Keyword(4) | erase addressing |
Keyword(5) | floating pulse |
1st Author's Name | Yuki IMAI |
1st Author's Affiliation | Department of Electronic Engineering, The University of Electro-Communications() |
2nd Author's Name | Tomokazu SHIGA |
2nd Author's Affiliation | Department of Electronic Engineering, The University of Electro-Communications |
Date | 2009/1/22 |
Paper # | EID2008-61 |
Volume (vol) | vol.108 |
Number (no) | 421 |
Page | pp.pp.- |
#Pages | 4 |
Date of Issue |