Presentation 2008-12-13
Development of FPGA-based training system for logical circuit design
Kei ODAI, Keiichi KOMATSU,
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Abstract(in English) We developed an FPGA-based training system for logical circuit design. This training system is used for the education of our junior college. We have already used it for two terms. In this paper, we report and introduce the training system.
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Keyword(in English) FPGA / logical circuit / VHDL
Paper # ET2008-59
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Committee ET
Conference Date 2008/12/6(1days)
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Registration To Educational Technology (ET)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Development of FPGA-based training system for logical circuit design
Sub Title (in English)
Keyword(1) FPGA
Keyword(2) logical circuit
Keyword(3) VHDL
1st Author's Name Kei ODAI
1st Author's Affiliation Department of Informatics and Media Technology, Shohoku College()
2nd Author's Name Keiichi KOMATSU
2nd Author's Affiliation Shohoku Extension Center, Shohoku College
Date 2008-12-13
Paper # ET2008-59
Volume (vol) vol.108
Number (no) 354
Page pp.pp.-
#Pages 4
Date of Issue