| Presentation | 2009-01-29 Improvement of Execution Efficiency by Applying Unitable PE Architecture for MX Core Yuta MIZOKAMI, Mitsutaka NAKANO, Masahiro IIDA, Toshinori SUEYOSHI, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | MX-Core is a massively parallel SIMD (Single Instruction Multiple Data) type processor which have fine-grained computing units (PE). The performance of MX-Core depends on the utilization rate of PEs. Therefore, it is necessary to achieve a high operational perfomance that it operate with high parallelism. However, the instruction level parallelism depends on applications or processing which is cause of performance deterioration in MX-Core. In this study,we proposed the unitable PE architecture. This architecture solves the parallelism problem of application. As a result, as compared with traditional architecture, the proposed architecture to RSA cryptography improves performance by 34%. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | MX core / SIMD / granularity |
| Paper # | VLD2008-103,CPSY2008-65,RECONF2008-67 |
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| Conference Information | |
| Committee | RECONF |
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| Conference Date | 2009/1/22(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
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| Vice Chair | |
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| Paper Information | |
| Registration To | Reconfigurable Systems (RECONF) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Improvement of Execution Efficiency by Applying Unitable PE Architecture for MX Core |
| Sub Title (in English) | |
| Keyword(1) | MX core |
| Keyword(2) | SIMD |
| Keyword(3) | granularity |
| 1st Author's Name | Yuta MIZOKAMI |
| 1st Author's Affiliation | Department of Mathematics and Computer Science, Graduate School of Science and Technology, Kumamoto University() |
| 2nd Author's Name | Mitsutaka NAKANO |
| 2nd Author's Affiliation | Department of Mathematics and Computer Science, Graduate School of Science and Technology, Kumamoto University |
| 3rd Author's Name | Masahiro IIDA |
| 3rd Author's Affiliation | Department of Mathematics and Computer Science, Graduate School of Science and Technology, Kumamoto University |
| 4th Author's Name | Toshinori SUEYOSHI |
| 4th Author's Affiliation | Department of Mathematics and Computer Science, Graduate School of Science and Technology, Kumamoto University |
| Date | 2009-01-29 |
| Paper # | VLD2008-103,CPSY2008-65,RECONF2008-67 |
| Volume (vol) | vol.108 |
| Number (no) | 414 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |