Presentation	2008-11-08 Automatic generation of self organizing map hardware Akira ONOO, Hiroomi HIKAWA,
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Abstract(in English)	This paper discusses the development of hardware Self-Organizing Map (SOM) generator, which generates VHSIC Hardware Description Language (VHDL) description of SOM. SOM proposed by T. Kohonen is a neural network with unsupervised leaning to classify multi-dimensional feature vector. SOM implemented in software has a problem that the performance decreases as the number of neurons increase. Hence hardware SOM is desired. The algorithm of SOM is suitable for parallel architecture, that can be implemented in hardware. However, the VHDL design tends to become large in proportion to the size of SOM. This paper discusses automatic generation of VHDL that describes the hardware SOM.
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Keyword(in English)	SOM / Hardware / VHDL / generator
Paper #	NC2008-65
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Conference Information
Committee	NC
Conference Date	2008/10/31(1days)
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Paper Information
Registration To	Neurocomputing (NC)
Language	JPN
Title (in Japanese)	(See Japanese page)
Sub Title (in Japanese)	(See Japanese page)
Title (in English)	Automatic generation of self organizing map hardware
Sub Title (in English)
Keyword(1)	SOM
Keyword(2)	Hardware
Keyword(3)	VHDL
Keyword(4)	generator
1st Author's Name	Akira ONOO
1st Author's Affiliation	Oita University()
2nd Author's Name	Hiroomi HIKAWA
2nd Author's Affiliation	Kansai University
Date	2008-11-08
Paper #	NC2008-65
Volume (vol)	vol.108
Number (no)	281
Page	pp.pp.-
#Pages	6
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