| Presentation | 2008-11-18 Development of Side-channel Attack Standard Evaluation BOard and Tool Yohei HORI, Toshihiro KATASHITA, Hirofumi SAKANE, Akashi SATOH, Kenji TODA, Hideki IMAI, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | Side-channel Attack Standard Evaluation BOards (SASEBO) and their analysis tools are developed to provide uniform experimental environment for evaluating security of cryptographic modules against chide-channel attacks. A side-channel attack is one of the latest attack methods that exploits power traces and electromagnetic radiation of LSIs to reveal secret data inside the devices. Since side-channel attacks are achieved with inexpensive equipments such as a digital oscilloscope, prove and desktop computer, their countermeasures must be urgently developed under the international cooperative research framework. SASEBO were developed to contribute to this framework and would enable fair validation of cryptographic module security. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | cryptography / hardware security / Field-Programmable Gate Arrays (FPGA) / side-channel attack / standard evaluation board |
| Paper # | RECONF2008-54 |
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| Conference Information | |
| Committee | RECONF |
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| Conference Date | 2008/11/10(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
| Secretary | |
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| Paper Information | |
| Registration To | Reconfigurable Systems (RECONF) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Development of Side-channel Attack Standard Evaluation BOard and Tool |
| Sub Title (in English) | |
| Keyword(1) | cryptography |
| Keyword(2) | hardware security |
| Keyword(3) | Field-Programmable Gate Arrays (FPGA) |
| Keyword(4) | side-channel attack |
| Keyword(5) | standard evaluation board |
| 1st Author's Name | Yohei HORI |
| 1st Author's Affiliation | Information Technology Research Institute, National Institute of Advanced Industrial Science and Technology (AIST)() |
| 2nd Author's Name | Toshihiro KATASHITA |
| 2nd Author's Affiliation | Research Center for Information Security, National Institute of Advanced Industrial Science and Technology (AIST) |
| 3rd Author's Name | Hirofumi SAKANE |
| 3rd Author's Affiliation | Research Center for Information Security, National Institute of Advanced Industrial Science and Technology (AIST) |
| 4th Author's Name | Akashi SATOH |
| 4th Author's Affiliation | Research Center for Information Security, National Institute of Advanced Industrial Science and Technology (AIST) |
| 5th Author's Name | Kenji TODA |
| 5th Author's Affiliation | Information Technology Research Institute, National Institute of Advanced Industrial Science and Technology (AIST) |
| 6th Author's Name | Hideki IMAI |
| 6th Author's Affiliation | Research Center for Information Security, National Institute of Advanced Industrial Science and Technology (AIST):Faculty of Science and Engineering, Chuo University |
| Date | 2008-11-18 |
| Paper # | RECONF2008-54 |
| Volume (vol) | vol.108 |
| Number (no) | 300 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |