| Presentation | 2008-11-17 Insertion-Point Selection of Canary FF for Timing Error Prediction YUJI Kunitake, TOSHINORI Sato, Seiichiro YAMAGUCHI, HIROTO Yasuura, |
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| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | The deep submicron semiconductor technologies increase parameter variations. The increase in parameter variations requires excessive design margin that has serious impact on performance and power consumption. In order to eliminate the excessive design margin, we are investigating canary logic. The canary logic requires additional circuits consisting of a Flip-Flop (FF) and a comparator. Thus, the canary logic suffers large area overhead. In order to reduce the area overhead, this paper proposes an insertion point selection strategy of canary FF and evaluates it. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | variation / Dynamic Voltage Scaling / reliability / critical path / worst-case design |
| Paper # | VLD2008-74,DC2008-42 |
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| Conference Information | |
| Committee | DC |
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| Conference Date | 2008/11/10(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | Dependable Computing (DC) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Insertion-Point Selection of Canary FF for Timing Error Prediction |
| Sub Title (in English) | |
| Keyword(1) | variation |
| Keyword(2) | Dynamic Voltage Scaling |
| Keyword(3) | reliability |
| Keyword(4) | critical path |
| Keyword(5) | worst-case design |
| 1st Author's Name | YUJI Kunitake |
| 1st Author's Affiliation | Graduate School of Information Science and Electrical Engineering, Kyushu University() |
| 2nd Author's Name | TOSHINORI Sato |
| 2nd Author's Affiliation | Department of Electronics Engineering and Computer Science, Fukuoka University:System LSI Research Center, Kyushu University:Japan Science and Technology Agency, CREST |
| 3rd Author's Name | Seiichiro YAMAGUCHI |
| 3rd Author's Affiliation | Graduate School of Information Science and Electrical Engineering, Kyushu University |
| 4th Author's Name | HIROTO Yasuura |
| 4th Author's Affiliation | Faculty of Information Science and Electrical Engineering, Kyushu University:Japan Science and Technology Agency, CREST |
| Date | 2008-11-17 |
| Paper # | VLD2008-74,DC2008-42 |
| Volume (vol) | vol.108 |
| Number (no) | 299 |
| Page | pp.pp.- |
| #Pages | 5 |
| Date of Issue | |