| Presentation | 2008-11-17 Coarse-Grained Reconfigurable Architecture with Flexible Reliability Younghun KO, Dawood ALNAJJAR, Yukio MITSUYAMA, Masanori HASHIMOTO, Takao ONOYE, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | Acceptable soft error rate on a VLSI chip varies depending on applications and operating environment so that recent VLSI designers concern reliability specification. In this paper, we propose a novel coarse-grained dynamically reconfigurable architecture, which offers flexible reliability. Introducing a notion of cluster cell, which comprises four execution modules, as a basic element of the proposed architecture, four operation modes (TMR, DMR, SMS, and SMM) can be realized with different redundancy and reliability levels. In the TMR operation mode, which attains the highest reliability level, outputs of three execution modules are voted inside of a cluster cell, making it possible to perform an error recovery without any rollback operations. Evaluation of soft error rates demonstrates that four different reliability levels can be achieved by the proposed architecture. The area of additional circuits to provide flexible reliability accounts for 30.5% of the proposed coarse-grained reconfigurable device. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | reliability / soft error / coarse-grained / reconfigurable architecture / TMR |
| Paper # | VLD2008-73,DC2008-41 |
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| Conference Information | |
| Committee | DC |
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| Conference Date | 2008/11/10(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | Dependable Computing (DC) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Coarse-Grained Reconfigurable Architecture with Flexible Reliability |
| Sub Title (in English) | |
| Keyword(1) | reliability |
| Keyword(2) | soft error |
| Keyword(3) | coarse-grained |
| Keyword(4) | reconfigurable architecture |
| Keyword(5) | TMR |
| 1st Author's Name | Younghun KO |
| 1st Author's Affiliation | Graduate School of Information Science and Technology, Osaka University:JST, CREST() |
| 2nd Author's Name | Dawood ALNAJJAR |
| 2nd Author's Affiliation | Graduate School of Information Science and Technology, Osaka University:JST, CREST |
| 3rd Author's Name | Yukio MITSUYAMA |
| 3rd Author's Affiliation | Graduate School of Information Science and Technology, Osaka University:JST, CREST |
| 4th Author's Name | Masanori HASHIMOTO |
| 4th Author's Affiliation | Graduate School of Information Science and Technology, Osaka University:JST, CREST |
| 5th Author's Name | Takao ONOYE |
| 5th Author's Affiliation | Graduate School of Information Science and Technology, Osaka University:JST, CREST |
| Date | 2008-11-17 |
| Paper # | VLD2008-73,DC2008-41 |
| Volume (vol) | vol.108 |
| Number (no) | 299 |
| Page | pp.pp.- |
| #Pages | 6 |
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