| Presentation | 2008-11-17 Dynamically Variable Secure Scan Architecture against Scan-based Side Channel Attack on Cryptography LSIs Hiroshi ATOBE, Ryuta NARA, Youhua SHI, Nozomu TOGAWA, Masao YANAGISAWA, Tatsuo OHTSUKI, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | Scan test is a powerful and popular test technique because it can control and observe the internal states of the circuit under test. However, scan chains would be used to discover the internals of crypto hardware, which presents a significant security risk of information leakage. An interesting design-for-test technique by inserting inverters into the internal scan chains to complicate the scan structure has been recently presented. Unfortunately, it still carries the potential of being attacked through statistical analysis of the information scanned out from chips. Therefore, in this paper we propose secure scan architecture, called dynamic variable secure scan, against scan-based side channel attack. The modified scan flip-flops are state-dependent, which could cause the output of each SDSFF to be inverted or not so as to make it more difficult to discover the internal scan architecture. We made an analysis on an AES implementation to show the effectiveness of the proposed method and discussed how our approach is resistant to scan-based side channel attack. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Scan-based attack / Secure scan architecture / Scan chain / AES |
| Paper # | VLD2008-69,DC2008-37 |
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| Committee | DC |
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| Conference Date | 2008/11/10(1days) |
| Place (in Japanese) | (See Japanese page) |
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| Topics (in Japanese) | (See Japanese page) |
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| Registration To | Dependable Computing (DC) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Dynamically Variable Secure Scan Architecture against Scan-based Side Channel Attack on Cryptography LSIs |
| Sub Title (in English) | |
| Keyword(1) | Scan-based attack |
| Keyword(2) | Secure scan architecture |
| Keyword(3) | Scan chain |
| Keyword(4) | AES |
| 1st Author's Name | Hiroshi ATOBE |
| 1st Author's Affiliation | Dept. of Computer Science and Engineering, Waseda University() |
| 2nd Author's Name | Ryuta NARA |
| 2nd Author's Affiliation | Dept. of Computer Science and Engineering, Waseda University |
| 3rd Author's Name | Youhua SHI |
| 3rd Author's Affiliation | Dept. of Computer Science and Engineering, Waseda University |
| 4th Author's Name | Nozomu TOGAWA |
| 4th Author's Affiliation | Dept. of Computer Science and Engineering, Waseda University |
| 5th Author's Name | Masao YANAGISAWA |
| 5th Author's Affiliation | Dept. of Computer Science and Engineering, Waseda University |
| 6th Author's Name | Tatsuo OHTSUKI |
| 6th Author's Affiliation | Dept. of Computer Science and Engineering, Waseda University |
| Date | 2008-11-17 |
| Paper # | VLD2008-69,DC2008-37 |
| Volume (vol) | vol.108 |
| Number (no) | 299 |
| Page | pp.pp.- |
| #Pages | 5 |
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