Presentation 2008-11-17
On Handling Cell Placement with Exclusive Adjacent Symmetry Constraints for Analog IC Layout Design
Shimpei ASANO, Kunihiro FUJIYOSHI,
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Abstract(in English) In recent high performance analog IC design, it is often required to place some cells symmetrically to a horizontal or vertical axis. Then, some methods of obtaining the closest placement that satisfies the given symmetry constraints and the topology constraints imposed by a sequence-pair were proposed. But, some cells placed symmetrically are required to be placed nearly. Therefore, in this paper, we define "exclusive adjacent symmetry constraint" and propose a method of obtaining the closest cell placement that satisfies the given constraints.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) symmetry constraint / sequence-pair / analog IC / placement
Paper # VLD2008-71,DC2008-39
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Committee VLD
Conference Date 2008/11/10(1days)
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Registration To VLSI Design Technologies (VLD)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) On Handling Cell Placement with Exclusive Adjacent Symmetry Constraints for Analog IC Layout Design
Sub Title (in English)
Keyword(1) symmetry constraint
Keyword(2) sequence-pair
Keyword(3) analog IC
Keyword(4) placement
1st Author's Name Shimpei ASANO
1st Author's Affiliation Department of Electrical and Electronic Engineering, Tokyo University of Agriculture and Technology()
2nd Author's Name Kunihiro FUJIYOSHI
2nd Author's Affiliation Department of Electrical and Electronic Engineering, Tokyo University of Agriculture and Technology
Date 2008-11-17
Paper # VLD2008-71,DC2008-39
Volume (vol) vol.108
Number (no) 298
Page pp.pp.-
#Pages 6
Date of Issue