| Presentation | 2008-10-30 Design of SFQ circuits using logic cells directly connectable to PTLs Hidetoshi SUZUKI, Hiroshi HARA, Yuki YAMANASHI, Nobuyuki YOSHIKAWA, |
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| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | In the design of SFQ circuits, two types of circuit elements are used for the interconnection of the circuits: one is Josephson transmission lines (JTL) and the other is passive transmission lines (PTL). JTL is used mainly for the gate-to-gate interconnection, whereas PTL is used for block-to-block interconnection in SFQ circuit design. In order to decrease the propagation delay and the power consumption of circuits and to increase the design flexibility, the extensive use of PTL even in the gate-to-gate interconnection is demanded. In this study, we propose a design approach based on gate-to-gate PTL wiring, where each logic cells can be directly connected to PTL. We made a new cell library. By using the new cell library, we designed a full adder, and confirmed its correct operations. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | SFQ / PTL / interconnection / half adder / SFQ circuits |
| Paper # | SCE2008-25 |
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| Conference Information | |
| Committee | SCE |
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| Conference Date | 2008/10/23(1days) |
| Place (in Japanese) | (See Japanese page) |
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| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | Superconductive Electronics (SCE) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Design of SFQ circuits using logic cells directly connectable to PTLs |
| Sub Title (in English) | |
| Keyword(1) | SFQ |
| Keyword(2) | PTL |
| Keyword(3) | interconnection |
| Keyword(4) | half adder |
| Keyword(5) | SFQ circuits |
| 1st Author's Name | Hidetoshi SUZUKI |
| 1st Author's Affiliation | Department of Electrical and Computer Engineering, Yokohama National University() |
| 2nd Author's Name | Hiroshi HARA |
| 2nd Author's Affiliation | Department of Electrical and Computer Engineering, Yokohama National University |
| 3rd Author's Name | Yuki YAMANASHI |
| 3rd Author's Affiliation | Department of Electrical and Computer Engineering, Yokohama National University |
| 4th Author's Name | Nobuyuki YOSHIKAWA |
| 4th Author's Affiliation | Department of Electrical and Computer Engineering, Yokohama National University |
| Date | 2008-10-30 |
| Paper # | SCE2008-25 |
| Volume (vol) | vol.108 |
| Number (no) | 268 |
| Page | pp.pp.- |
| #Pages | 5 |
| Date of Issue | |