Presentation 2008-09-26
Practice Evaluation of Dynamically Reconfigurable Processor MuCCRA-2β
Yoshiki SAITO, Masaru KATO, Shotaro SAITO, Toru SANO, Keiichiro HIRAI, Takashi NISHIMURA, Takuro NAKAMURA, Satoshi TSUTSUMI, Yohei HASEGAWA, Hideharu AMANO,
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Abstract(in English) Dynamically Reconfigurable Processing Array (DRPA) has been received an attention as a flexible and efficient off-loading engine for various types of System-on-Chips (SoCs). Although some devices are commercially available, an evaluation results with real chips have been rarely reported. MuCCRA (Multi-Context Configurable Reconfigurable Architecture) project aims to establish techniques to generate a cost effective low power DRPA for a given target application. MuCCAR-2 is the second prototype chip of MuCCRA project and MuCCRA-2β, which includes a PE and reconfiguration mechanism was also taped out as a prototype for evaluation. In this paper, we implemented three kinds of image processing applications on MuCCRA-2β, and measured its frequency and power consumption. As a result, in case of executing nega/posi filter at 55.2MHz of frequency, and of executing two more applications (horizontal smoothing and sepia filter) sequentially at 49.5MHz, 5.44mW of power consumption was confirmed at the average.
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Paper # RECONF2008-34
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Committee RECONF
Conference Date 2008/9/18(1days)
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Language JPN
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Title (in English) Practice Evaluation of Dynamically Reconfigurable Processor MuCCRA-2β
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1st Author's Name Yoshiki SAITO
1st Author's Affiliation Faculty of Science and Technology, Keio University()
2nd Author's Name Masaru KATO
2nd Author's Affiliation Faculty of Science and Technology, Keio University
3rd Author's Name Shotaro SAITO
3rd Author's Affiliation Faculty of Science and Technology, Keio University
4th Author's Name Toru SANO
4th Author's Affiliation Faculty of Science and Technology, Keio University
5th Author's Name Keiichiro HIRAI
5th Author's Affiliation Faculty of Science and Technology, Keio University
6th Author's Name Takashi NISHIMURA
6th Author's Affiliation Faculty of Science and Technology, Keio University
7th Author's Name Takuro NAKAMURA
7th Author's Affiliation Faculty of Science and Technology, Keio University
8th Author's Name Satoshi TSUTSUMI
8th Author's Affiliation Faculty of Science and Technology, Keio University
9th Author's Name Yohei HASEGAWA
9th Author's Affiliation Faculty of Science and Technology, Keio University
10th Author's Name Hideharu AMANO
10th Author's Affiliation Faculty of Science and Technology, Keio University
Date 2008-09-26
Paper # RECONF2008-34
Volume (vol) vol.108
Number (no) 220
Page pp.pp.-
#Pages 6
Date of Issue