| Presentation | 2008-09-25 A Hardware Evaluation System for 2D Interconnection Networks by using an FPGA Based Network Card Akira UEJIMA, Masaki KOHATA, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | This paper describes an FPGA based network interface card for PC clusters and a hardware network evaluation system by using the developed card. In this network card, a host interface, a small scale switch and four communication ports are implemented on one low-cost FPGA. This card also includes two memory chips to record the communication traffic density and the start/end time of each communication. This system aims to experiment and to evaluate communication protocols and routing methods on real hardware by reconfiguration of FPGA. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | FPGA / PC Cluster / Interconnection Network |
| Paper # | RECONF2008-28 |
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| Conference Information | |
| Committee | RECONF |
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| Conference Date | 2008/9/18(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | Reconfigurable Systems (RECONF) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A Hardware Evaluation System for 2D Interconnection Networks by using an FPGA Based Network Card |
| Sub Title (in English) | |
| Keyword(1) | FPGA |
| Keyword(2) | PC Cluster |
| Keyword(3) | Interconnection Network |
| 1st Author's Name | Akira UEJIMA |
| 1st Author's Affiliation | Faculty of Engineering, Okayama University of Science() |
| 2nd Author's Name | Masaki KOHATA |
| 2nd Author's Affiliation | Faculty of Engineering, Okayama University of Science |
| Date | 2008-09-25 |
| Paper # | RECONF2008-28 |
| Volume (vol) | vol.108 |
| Number (no) | 220 |
| Page | pp.pp.- |
| #Pages | 6 |
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