| Presentation | 2008-08-28 An estimation of a large-scale Dynamic Optically Reconfigurable Gate Array VLSI Daisaku SETO, Minoru WATANABE, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | Recently, various fast reconfigurable devices have been developed. We have been developing a type of such fast reconfigurable devices, Optically Reconfigurable Gate Arrays (ORGAs) that can be reconfigured with optical components in a perfectly parallel. In this device, gate array's activity can be increased by exploiting such fast dynamic reconfiguration capabilities. This paper presents the world's largest gate count dynamic optically reconfigurable gate array VLSI and its estimation results. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | FPGAs / Optically Reconfigurable Gate Arrays (ORGAs) / Holographic memories |
| Paper # | EMD2008-37,CPM2008-52,OPE2008-67,LQE2008-36 |
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| Conference Information | |
| Committee | LQE |
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| Conference Date | 2008/8/21(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | Lasers and Quantum Electronics (LQE) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | An estimation of a large-scale Dynamic Optically Reconfigurable Gate Array VLSI |
| Sub Title (in English) | |
| Keyword(1) | FPGAs |
| Keyword(2) | Optically Reconfigurable Gate Arrays (ORGAs) |
| Keyword(3) | Holographic memories |
| 1st Author's Name | Daisaku SETO |
| 1st Author's Affiliation | Faculty of Engineering, Shizuoka University() |
| 2nd Author's Name | Minoru WATANABE |
| 2nd Author's Affiliation | Faculty of Engineering, Shizuoka University |
| Date | 2008-08-28 |
| Paper # | EMD2008-37,CPM2008-52,OPE2008-67,LQE2008-36 |
| Volume (vol) | vol.108 |
| Number (no) | 194 |
| Page | pp.pp.- |
| #Pages | 5 |
| Date of Issue | |