Presentation 2008-07-25
Implementation of Block Cipher Camellia with a Configurable and Extensible Processor
Kazuyoshi MATSUO, Koki ABE,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English) Camellia, a block cipher algorithm, has been implemented on a configurable and extensible processor to measure cycles and power consumption required for processing the algorithm when varying the configuration parameters and/or extending the instruction set of the processor. Results of optimizing configuration parameters revealed the reduction of processing cycles by approximately 10%. Extending the instruction set reduced processing cycles and total power consumption by 1/106 and 1/18, respectively. The extension has larger effect on reducing total power consumption for processing Camellia than AES.
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Keyword(in English) Camellia / block cipher / configurable and extensible processor / power consumption / processing cycle
Paper # ISEC2008-45
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Committee ISEC
Conference Date 2008/7/17(1days)
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Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Implementation of Block Cipher Camellia with a Configurable and Extensible Processor
Sub Title (in English)
Keyword(1) Camellia
Keyword(2) block cipher
Keyword(3) configurable and extensible processor
Keyword(4) power consumption
Keyword(5) processing cycle
1st Author's Name Kazuyoshi MATSUO
1st Author's Affiliation Department of Computer Science, The University of Electro-Communications()
2nd Author's Name Koki ABE
2nd Author's Affiliation Department of Computer Science, The University of Electro-Communications
Date 2008-07-25
Paper # ISEC2008-45
Volume (vol) vol.108
Number (no) 162
Page pp.pp.-
#Pages 6
Date of Issue