Presentation 2008-07-11
Chip design of a Successive Approximation A/D Converter for a Structure Monitoring System(Session8A: Si Devices III)
Jae-Woon Kim, Jinwook Burm,
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Abstract(in English) This paper describes a design of a 10-bit 500KS/s CMOS successive approximation analog-to-digital converter for optical fiber sensor driving IC which is used for structure monitoring system. We adopted a charge-scaling DAC using a split array and hence reduced the area of capacitors by 1/15 multiple compared with a charge-scaling DAC. An output offset storage technique is applied to the design of comparator. The total power consumption of designed circuit is 1.9mW at the supply voltage of 3.3V with a 0.25μm COMS technology.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) Analog-to-digital converter (ADC) / charge-scaling DAC / structure monitoring system
Paper # ED2008-87,SDM2008-106
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Committee ED
Conference Date 2008/7/2(1days)
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Language ENG
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Chip design of a Successive Approximation A/D Converter for a Structure Monitoring System(Session8A: Si Devices III)
Sub Title (in English)
Keyword(1) Analog-to-digital converter (ADC)
Keyword(2) charge-scaling DAC
Keyword(3) structure monitoring system
1st Author's Name Jae-Woon Kim
1st Author's Affiliation Dept. of Electronic Engineering, Sogang University()
2nd Author's Name Jinwook Burm
2nd Author's Affiliation Dept. of Electronic Engineering, Sogang University
Date 2008-07-11
Paper # ED2008-87,SDM2008-106
Volume (vol) vol.108
Number (no) 121
Page pp.pp.-
#Pages 5
Date of Issue