講演名 2008-07-11
CMOS digitally controlled programmable gain amplifier (PGA) with DC offset cancellation(Session8A: Si Devices III)
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抄録(和)
抄録(英) This paper presents a programmable gain amplifier (PGA) to integrate a RF direct-conversion receiver for DVB-H/T-DMB standards. The proposed CMOS PGA includes both a digital controlled gain amplifier to improve linearity and DC input offset voltage cancellation. The PGA for the mobile TVs requires specifications such as 3-dB bandwidth of I MHz and wide dynamic range of more than 40dB. The PGA is composed of three parts, an amplification core, a digital gain control circuit and a DC offset cancellation circuit. The PGA (amplification) core block is a current mode amplifier with a digital gain controller consists of switched resister array structure. The DC offset cancellation block is based on RC low-pass filter which is connected to input of the PGA core to feedback a nearly DC signal, so that nearly DC signal has a high close-loop gain for elimination of the offset voltage. The proposed PGA is designed using TSMC 0.25μm CMOS technology library, and which shows dynamic range of 40dB with 2.5dB gain steps throughout 2MHz desired-3-dB bandwidth. All Circuits were designed with the supply voltage of 3.3V. The power dissipation is 8.36mW.
キーワード(和)
キーワード(英) PGA / Gain / Digitally / Amplifier / Offset / Cancellation
資料番号 ED2008-85,SDM2008-104
発行日

研究会情報
研究会 ED
開催期間 2008/7/2(から1日開催)
開催地(和)
開催地(英)
テーマ(和)
テーマ(英)
委員長氏名(和)
委員長氏名(英)
副委員長氏名(和)
副委員長氏名(英)
幹事氏名(和)
幹事氏名(英)
幹事補佐氏名(和)
幹事補佐氏名(英)

講演論文情報詳細
申込み研究会 Electron Devices (ED)
本文の言語 ENG
タイトル(和)
サブタイトル(和)
タイトル(英) CMOS digitally controlled programmable gain amplifier (PGA) with DC offset cancellation(Session8A: Si Devices III)
サブタイトル(和)
キーワード(1)(和/英) / PGA
第 1 著者 氏名(和/英) / Kyunghoon Kim
第 1 著者 所属(和/英)
Faculty of Engineering, Sogang University
発表年月日 2008-07-11
資料番号 ED2008-85,SDM2008-104
巻番号(vol) vol.108
号番号(no) 121
ページ範囲 pp.-
ページ数 6
発行日