Presentation 2008-07-10
Simulation of Retention Characteristics in Double-Gate Structure Multi-bit SONOS Flash Memory(Session4A: Nonvolatile Memory)
Doo-Hyun Kim, Il Han Park, Byung-Gook Park,
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Abstract(in English) This paper presents a detailed study of the retention characteristics in scaled multi-bit SONOS flash memories. By calculating the oxide field and tunneling currents, we evaluate the charge trapping mechanism. We calculate transient retention dynamics with the ONO fields, trapped charge, and tunneling currents. All the parameters were obtained by physics-based equations and without any fitting parameters or optimization steps. The results can be used with nanoscale nonvolatile memory. This modeling accounts for the V_T shift as a function of trapped charge, time, and thickness of silicon oxide and silicon nitride layers, and can be used for optimizing the ONO geometry and parameters for maximum performance.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) SONOS / flash memory / nitride-based charge trap memory / retention / multi-bit / double gate
Paper # ED2008-55,SDM2008-74
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Committee SDM
Conference Date 2008/7/2(1days)
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Registration To Silicon Device and Materials (SDM)
Language ENG
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Simulation of Retention Characteristics in Double-Gate Structure Multi-bit SONOS Flash Memory(Session4A: Nonvolatile Memory)
Sub Title (in English)
Keyword(1) SONOS
Keyword(2) flash memory
Keyword(3) nitride-based charge trap memory
Keyword(4) retention
Keyword(5) multi-bit
Keyword(6) double gate
1st Author's Name Doo-Hyun Kim
1st Author's Affiliation Inter-University Semiconductor Research Center and School of Electrical Engineering, Seoul National University()
2nd Author's Name Il Han Park
2nd Author's Affiliation Inter-University Semiconductor Research Center and School of Electrical Engineering, Seoul National University
3rd Author's Name Byung-Gook Park
3rd Author's Affiliation Inter-University Semiconductor Research Center and School of Electrical Engineering, Seoul National University
Date 2008-07-10
Paper # ED2008-55,SDM2008-74
Volume (vol) vol.108
Number (no) 122
Page pp.pp.-
#Pages 4
Date of Issue