| Presentation | 2008-07-18 Realistic future trend of non-volatile semiconductor memory and feasibility study of ultra-low-cost high-speed universal non-volatile memory : feasibility study of BiCS type FeRAM and MRAM Shigeyoshi Watanabe, Koichi Sugano, Shoto Tamai, |
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| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | The realistic future trend of non-volatile semiconductor memory - FeRAM, MRAM, PRAM, ReRAM-compared with NAND type flash memory based on the history, market, and its performance has been described. Next, the feasibility study of ultra-low-cost high-speed universal non-volatile memory has been achieved based on the cost analysis of BiCS type NAND flash memory. Vertical one transistor type memory cell which can be connected in series and randomly accessed using the gate control voltage will be the promising candidates for this puropose. Finally as an example BiCS type 1 transistor FeRAM, chain FeRAM and 1 transistor MRAM bas been discussed. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Non-volatile memory / NAND type flash / FeRAM / MRAM / PRAM / ReRAM / BiCS |
| Paper # | SDM2008-145,ICD2008-55 |
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| Conference Information | |
| Committee | ICD |
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| Conference Date | 2008/7/10(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
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| Vice Chair | |
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| Paper Information | |
| Registration To | Integrated Circuits and Devices (ICD) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Realistic future trend of non-volatile semiconductor memory and feasibility study of ultra-low-cost high-speed universal non-volatile memory : feasibility study of BiCS type FeRAM and MRAM |
| Sub Title (in English) | |
| Keyword(1) | Non-volatile memory |
| Keyword(2) | NAND type flash |
| Keyword(3) | FeRAM |
| Keyword(4) | MRAM |
| Keyword(5) | PRAM |
| Keyword(6) | ReRAM |
| Keyword(7) | BiCS |
| 1st Author's Name | Shigeyoshi Watanabe |
| 1st Author's Affiliation | Department of Information Science, Shonan Institute of Technology() |
| 2nd Author's Name | Koichi Sugano |
| 2nd Author's Affiliation | Department of Information Science, Shonan Institute of Technology |
| 3rd Author's Name | Shoto Tamai |
| 3rd Author's Affiliation | Department of Information Science, Shonan Institute of Technology |
| Date | 2008-07-18 |
| Paper # | SDM2008-145,ICD2008-55 |
| Volume (vol) | vol.108 |
| Number (no) | 140 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |