| Presentation | 2008-03-27 Generating Sparse Matrices for Power/Signal Integrity Evaluation Yuichi TANJI, Hideki ASAI, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | In this report, we propose some techniques for generating sparse matrices which are necessary for power/signal integrity evaluation for designing VLSI, package, and printed circuit board. Especially, this paper presents generating stable and sparse reluctance/inductance matrix with guaranteed stability. These methods can be also applied to the capacitance matrix. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Inductance / Reluctance / Power/Signal Integrity |
| Paper # | NLP2007-165 |
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| Conference Information | |
| Committee | NLP |
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| Conference Date | 2008/3/20(1days) |
| Place (in Japanese) | (See Japanese page) |
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| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | Nonlinear Problems (NLP) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Generating Sparse Matrices for Power/Signal Integrity Evaluation |
| Sub Title (in English) | |
| Keyword(1) | Inductance |
| Keyword(2) | Reluctance |
| Keyword(3) | Power/Signal Integrity |
| 1st Author's Name | Yuichi TANJI |
| 1st Author's Affiliation | Dept. of RISE, Kagawa University() |
| 2nd Author's Name | Hideki ASAI |
| 2nd Author's Affiliation | Dept. of Systems Eng., Shizuoka University |
| Date | 2008-03-27 |
| Paper # | NLP2007-165 |
| Volume (vol) | vol.107 |
| Number (no) | 560 |
| Page | pp.pp.- |
| #Pages | 5 |
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